The present invention relates to a semiconductor integrated circuit and, more particularly, to a semiconductor integrated circuit which uses vertical PNP transistors.
Generally, in a bi-polar integrated circuit, NPN transistors are used. For this reason, a p type silicon substrate is used. In designing a circuit, however, it often becomes necessary to use PNP transistors. To form such PNP transistor on a p type silicon substrate, various types of PNP transistor can be adopted. In recent years, vertical PNP transistors, which have such a structure as shown in FIG. 1A, have been widely adopted. In order to form this type of PNP transistor, an n.sup.+ type buried layer serving as a local n type silicon substrate is formed on the p type silicon substrate. On his buried layer, a collector region (p conductivity type), base region (n conductivity type) and emitter region (p conductivity type) are formed in this order as shown in FIG. 1A.
In the vertical PNP transistor, a parasitic diode is formed between the p.sup.+ type region, which forms the collector, and the n type substrate (n.sup.+ type buried layer), which forms a junction together therewith. In order to reversely bias this parasitic diode, the n type substrate is connected to a power source. Since both the P.sup.+ type region and the n type substrate have high density impurity, and thus the depletion region is very narrow, the parasitic diode has a large junction capacitance.
With output impedance of the collector of the vertical PNP transistor, there arises no problem in the d.c. sense because the parasitic diode is rendered nonconductive. In the a.c. sense, however, a problem arises in that, as the frequency of the input signal increases, the output impedance decreases because the parasitic diode is large in junction capacitance. When the vertical PNP transistor is used as an amplifying transistor, a junction capacitance is connected in parallel with a load resistor between the collector of the transistor and ground. For this reason, as the frequency of an input signal increases, the load impedance decreases. Consequently, the frequency characteristic of amplifier gain is remarkably deteriorated. In other words, a frequency region which has a flat characteristic becomes narrow.
In the case, as well, where a differential amplifier circuit is constituted by vertical PNP transistors, its frequency characteristic is affected by parasitic diodes. In the differential amplifier circuit, a pair of differential transistors each consisting of vertical PNP transistor and a pair of constant current source transistors each consisting of vertical PNP transistor are used, resulting in a complicated circuit construction. Therefore, parasitic diodes greatly affect the frequency characteristic of the differential circuit. That is, a ripple occurs in the frequency characteristic. The ripple in the frequency characteristic will cause a waveform distortion such as ringing in the output of the circuit. The ripple in the frequency characteristic is attributable to an integrating time constant associated with a parasitic diode connected to a load as well as to a differentiating time constant associated with a parasitic diode connected to a constant current transistor. The integrating time constant acts to cause a decrease in the gain, while the differentiating time constant acts to cause an increase in the gain.